With a highly qualified faculty and top-notch infrastructure, the Department of Computer Science (DCC) at UFMG has been training exceptional students for nearly five decades. These students are highly sought after in the job market. A recent testament to this importance is the hiring of five recent DCC graduates by Cadence Design Systems in a short period, highlighting not only the quality of academic training at the university but also its strong connection to the technology industry.
All members of the DCC’s Compilers Laboratory (LaC), these professionals work on the development of strategic tools at Cadence, such as the Xtensa Neural Network Compiler (XNNC) and the Innovus circuit optimizer. Michael Canesche (PhD), Guilherme Oliveira, Rafael Sumitani, and Lucas Silva are part of the team responsible for XNNC, a compiler specialized in optimizing neural network models for efficient execution on Xtensa processors and accelerators. Their work involves analyzing models to enable the generation of hardware-optimized code. The team’s focus is performance: they aim to produce binary code for neural networks that is efficient, memory-conscious, and accurate. Rafael Sumitani emphasizes how the knowledge acquired at DCC applies directly to his work:
“At the XNNC team, we work with a compiler infrastructure for neural network models running on Cadence DSPs. Our goal is to improve the performance of these models by optimizing operations such as matrix multiplications and processor cache usage. It’s a very interesting and challenging job where I directly apply what I learned at DCC/UFMG,” he explains.
João Vitor Amorim (MSc) was hired to work on the development of Innovus, one of the world’s leading tools for physical implementation of integrated circuits. João works on the Clock Tree Synthesis (CTS) stage, which designs and optimizes the signal distribution network within circuits. This is a very important step to prevent timing delays and signal imbalances.
“This work allows me to apply knowledge in parallel computing and optimization heuristics, while also deepening my understanding of the differences between hardware and software development,” he says.
For many years, companies have recognized the high quality of DCC students and the importance of maintaining strong ties with the university. Cadence, in particular, has maintained a partnership with DCC since 2019, fostering research and academic projects. This collaboration not only enhances student training but also yields significant benefits for the company, which gains professionals with exactly the skills it needs.
An example of this is the work of former DCC students Michael Canesche and João Amorim. During his PhD, Canesche developed algorithms that are now part of cutting-edge tools like Apache TVM and XNNC itself. Amorim, in turn, created ChiGen, a Verilog fuzzer capable of detecting bugs in hardware development tools, which is now integrated into Cadence’s Jasper formal verification platform.
This cooperation also enriches the academic training of Cadence’s own professionals. In 2024, Cadence engineers taught the elective course “Formal Hardware Verification” for DCC computer science students. The collaboration has also resulted in high-impact publications at international conferences, including the ACM CC’25 (International Conference on Compiler Construction). One of the papers presents the kernel fusion algorithm developed at LaC and incorporated into XNNC, while another details testing techniques developed within Cadence itself.
This collaboration demonstrates how partnerships between universities and companies can drive meaningful technological and academic advances. The combination of DCC/UFMG’s tradition in training highly qualified professionals with its cutting-edge technology development reinforces the department’s role as a center of excellence in research and innovation; hence, contributing to the growth of the technology sector in Brazil.
